Almost every modern power management integrated circuit, IC incorporates a variety of different low dropout regulators to provide stable and accurately regulated supply rails. The design of LDOs strongly differs from a conventional regulator design were the output current load is well defined. In contrast, the LDO circuit needs to be stable from no load current to its specified maximum load current. This requirement changes significantly the transfer function of the LDO and makes it a design challenge to provide a stable supply over a variety of the load conditions for the specified accuracy and power consumption.
Prior art compensation schemes for linear regulators rely on a Miller compensation capacitance to split the dominant and the non-dominant pole to make the regulator stable. However, the bias current of the first stage has to be as low as possible to guarantee the pole splitting at no current load (no load condition).
Another important requirement of a LDO circuit is a sink capability which provides a supply line regulation for fast load changes. Most state of the art approaches do not have “a time continues” sink capability. They sink current by enabling a constant load if the output voltage rises above a certain threshold, which can cause voltage overshoot at the supply rail and disrupt the performance of the LDO circuit.